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Figure 2-6. Electronic interface assembly test functional diagram (sheet 15 of 15)
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TM-9-4931-363-14-P Fire Control Subsystem Test Set AN/GSM-249 P/N 2201736-05 Manual
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Figure 2-7. Buffer amplifier module test functional diagram
TM 9-4931-363-14&P
2-13. Buffer Amplifier Test Theory.
2-14. Sequencer Card A9 Test Theory.
a. Reference Material. The following reference
a. Reference Material. The following reference
materials are required to support the sequencer card A9 test
materials are required to support the buffer amplifier test
theory discussion:
theory discussion:
(1) Sequencer
card
A9
test
table
from
TM
table from TM
9-1270-212-14&P
9-1270-212-14&P
(2) Sequencer card A9 foldout schematic diagram
(2) Buffer amplifier schematic diagram from TM
from TM 9-1270-212-14&P
9-1270-212-14&P
(3) Sequencer card A9 test functional diagram (fig.
(3) Buffer amplifier module test functional diagram
b. Theory Discussion
b. Theory Discussion.
(1) To prepare for the sequencer card A9 test theory
discussion, refer to the troubleshooting sequencer card A9
(1) To prepare for the buffer amplifier test theory
procedures in TM 9-1270-212-14&P and mentally perform
discussion, refer to the troubleshooting procedures for
steps a through d.
b u f f e r amplifier modules A1 through A8 in TM
9-1270-212-14&P and mentally perform steps a through e.
(2) Refer to step 1 in figure 2-8 and in the A9 test
table. The A9 sequencer card under test is connected to J7
(2) Refer to figure 2-7 and to step 1 in the buffer
on the test set. With S8 set to position 5, 5 volts dc is
amplifier test table. The buffer amplifier module under test
connected from XA12-32 through wiper 1 and contact 6 of
is connected to J10 on the test set. Both channels of the
S8-F to J7-1. The signal return from the card is connected
buffer amplifier are excited through wiper 1 and contact 4
to J7-41. Wiper 1 and contact 6 of S8-B apply a ground to
of S4, banks D through G, and through wiper 1 and contact
J7-24, which inhibits the skip function on the card. J7-11
12 of S3, banks A through D, to the buffer amplifier under
and J7-13 are also grounded through CR16, which enables
test. The outputs from the buffer amplifier under test are
decoder U10 on the card. Setting S5 to position 8 connects
connected through wiper 1 and contact 12 of S3, banks C,
the enable A signal at J7-10 through contact 8 and wiper 2
E, F, H, and I, to the test set resolver. With S9 set to
of S5-B to J12 on the test set front panel. An oscilloscope
position R2, the R2 output of the test resolver is connected
is connected between J12 and J18 as shown in figure 2-8.
through S5-A to the meter and A2 card for readout.
Pressing S11 connects 28 volts dc through wiper 1 and
contact 7 of S4-B, and through wiper 1 and contact 6 of
(3) Refer to figure 2-7 and to step 2 in the buffer
S8-F to energize K8 in the test set. Contacts 2 and 1 of K8
amplifier test table. When S11 is pressed, 28 volts is applied
apply a ground to J7-6 causing the reset signal to go low
through W1 and contact 4 of S4-B to J10-1, energizing K1,
momentarily. Refer to the A9 foldout schematic from TM
K2, and K3 in the buffer amplifier. This connects the
9-1270-212-14&P. The momentary low resets the logic
out-of-phase signals at J10-17 and -22 to the buffer
circuitry on the card, and when the switch is released, the
amplifier. With S9 set to position R2, the R2 output of the
logic circuitry begins a normal count. Since the skip signal
test set resolver is connected to the meter and A2 card for
is low, the count from U10 proceeds in a normal sequence.
readout.
When U10-13 goes low, counter U4 is inhibited by lows at
pins 7 and 10 and the count stops automatically. The two
(4) Refer to figure 2-7 and to step 3 in the buffer
enable-A signals will be displayed on the oscilloscope. S11
amplifier test table. With S9 set to position R3, the R3
can be pressed repeatedly as required to display the pulses.
output of the test set resolver is connected to the meter and
A2 card for readout.
(3) Refer to step 2 in figure 2-8 and in the A9 test
table. With S5 in position 2, the enable-B signals at J7-8 are
(5) Refer to figure 2-7 and to step 4 in the buffer
connected through contact 9 and wiper 2 of S5-B and
amplifier test table. When S11 is pressed and S9 is set to
through J12 to the oscilloscope. The timing sequence of
position R3, the R3 output of the test resolver is connected
step 1 is repeated by momentarily pressing S11 repeatedly,
as required to display the enable-B signals.
to the meter and the A2 card for readout.

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