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Figure 2-2. Test set self-test functional diagram (sheet 4 of 4)
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TM-9-4931-363-14-P Fire Control Subsystem Test Set AN/GSM-249 P/N 2201736-05 Manual
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HSS Test Theory.
TM 9-4931-363-14&P
Section III. HSS TEST THEORY
2-5. General.
dc signal becomes a BIT initiate for the EIA and K3 latches.
The latched K3 applies returns for the four indicators that
The following reference materials are required to
indicate the status of the EIA. If a linkage was bypassed at
the beginning of step 2 in the HSS test table, the test set
support the HSS test theory discussions:
provided substitute voltages for the missing linkage. Steps 3
and 4 of the HSS test table isolate between a failed linkage
a. HSS test table from TM 9-1270-212-14&P
and a failed EIA by having the test set provide the
substitute voltages to the EIA. The test set substitute
b. EIA schematic diagrams from TM 9-1270-212-14&P
voltage connections are shown in steps 3 and 4 of figure
c. HSS test functional diagram (fig. 2-3)
d. Mentally set the EIA BIT switch to 2. The 28 volts dc
d. Test cable W2 schematic diagram (foldout FO- 1)
is connected through wiper 1 and contact 6 of S4-A,
through wiper 2 and contact 9 of S6-B, and through wiper
e. Phase detector and light self-test card A2 schematic
1 and contact 3 of S2-A to energize K4. When K4 energizes,
diagram (foldout FO-3).
it connects three reference voltages from variable resistors
R8, R7, and R10 of the test set divider network (foldout
2-6. HSS Test Theory.
FO-2) through wipers 1 and 2 and contacts 3 and 9 of S2-B
and through wipers 1 and 2 and contacts 3 and 9 of S2-C,
a. To prepare for the HSS test theory discussion, refer
through J2 as six separate signals, and through branched
to the HSS troubleshooting procedures in TM
test cable W2 by way of connectors P5 and P6 to linkage
9-1270-212-14&P and mentally perform steps a through e.
input connectors J3 and J4 on the EIA. The voltages
provide an input for one or two bypassed linkages. If the
b. Refer to step 1 in figure 2-3 and in the HSS test
failure repeats when S11 is pressed again, the EIA is faulty.
table. Contact 6 of S4-A connects 28 volts dc through CR7
to energize K1. Energized K1 connects 115 volts ac to J1-J
e. Should either or both linkages fail the EIA BIT of
and 28 volts dc to J1-L, which apply power to the EIA.
With SYSTEM switch S6 in position 1, pressing
step 2 and subsequent testing fails to confirm a failure, an
FUNCTION INITIATE switch S11 connects 28 volts dc
out-of-position BIT bracket on the front support of either
or both linkages should be the cause. Steps 5, 6, and 7
through wiper 1 and contact 6 of S4-B and through wiper 1
and contact 2 of S6-B to XA2-33. J2-K, the power fail logic
check the gunner linkage channel of the EIA and steps 9,
10, and 11 check the pilot linkage channel of the EIA. The
test signal from EIA power supply card A12, is connected
test setup procedure of step 5 in the HSS test table causes
through test cable W2 to J1-q and to XA2-31 in the test set.
the test set to apply three signals to the EIA that simulate a
The power fail logic from the EIA under test is normally
turret or TSU position. Step 5 also applies a ground to one
high. Refer to phase detector and light self-test A2 card
side of the four boresight potentiometers in the EIA, to
schematic (foldout FO-3). The high is applied through
eliminate any system noise on the potentiometer input lines
XA2-31 to U1-1 on the test set A2 card. When S11 is
to EIA amplifier card A13. The same signals are applied to
pressed, the voltage divider consisting of R14 and R15
the gunner and pilot inputs, and subsequent positioning of
applies a high to U1-2. The low at U1-3 is inverted to a high
the test set METER SELECT and RSLVR SELECT
at U1-6, which turns Q5 on. The resultant ground at
switches connect the error signals generated by the EIA and
XA2-27 completes the circuit for POWER SUPPLY BIT
linkages to the meter and phase detector, one at a time, to
indicator DS7, which lights (fig. 2-3, step 1). When S11 is
determine the voltage and phase of each signal. If a signal is
released, DS7 goes out. If the power fail logic signal at
outside the tolerance specified in the HSS table, the BIT
XA2-31 is low, DS7 does not light.
bracket is moved until all three error signals are within
tolerance.
c. Refer to step 2 in figure 2-3 and in the HSS test table.
Wiper 1 and contact 6 of S4-A apply 28 volts dc through
f. Refer to figure 2-3, sheet 2. Five volts ac, phase angle
wiper 2 and contact 9 of S6-B to K3-4. The output of S11
180 degrees, is connected through wiper 1 and contact 6 of
is connected through wiper 1 and contact 6 of S4-B and
S4-G, through wiper 1 and contact 5 of S6-D, and through
through wiper 1 and contact 3 of S6-B to J1-f and through
test set connector J1-T and cable W2 to EIA connector
CX3 to K3-5. When S11 is pressed, the momentary 28-volt

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